DDR3 SDRAM UDIMMMT16JTF25664AZ – 2GBMT16JTF51264AZ – 4GBMT16JTF1G64AZ – 8GBFeatures• DDR3 functionality and operations supported as percomponent data
Electrical SpecificationsStresses greater than those listed may cause permanent damage to the module. This is astress rating only, and functional oper
DRAM Operating ConditionsRecommended AC operating conditions are given in the DDR3 component data sheets.Component specifications are available on Mic
IDD SpecificationsTable 12: DDR3 IDD Specifications and Conditions – 2GB (Die Revision G)Values are for the MT41J128M8 DDR3 SDRAM only and are compute
Table 13: DDR3 IDD Specifications and Conditions – 4GB (Die Revision M)Values are for the MT41J256M8 DDR3 SDRAM only and are computed from values spec
Table 14: DDR3 IDD Specifications and Conditions – 4GB (Die Revision K)Values are for the MT41J256M8 DDR3 SDRAM only and are computed from values spec
Table 15: DDR3 IDD Specifications and Conditions – 8GB (Die Revision D)Values are for the MT41J512M8 DDR3 SDRAM only and are computed from values spec
Table 16: DDR3 IDD Specifications and Conditions – 8GB (Die Revisions E and J)Values are for the MT41J512M8 DDR3 SDRAM only and are computed from valu
Serial Presence-Detect EEPROMFor the latest SPD data, refer to Micron's SPD page: www.micron.com/SPD.Table 17: Serial Presence-Detect EEPROM DC O
Module DimensionsFigure 3: 240-Pin DDR3 UDIMM 30.50 (1.20)29.85 (1.175)Pin 117.3 (0.68)TYP2.50 (0.098) D(2X)2.30 (0.091) TYP5.0 (0.197) TYP123.0 (4.84
Table 2: AddressingParameter 2GB 4GB 8GBRefresh count 8K 8K 8KRow address 16K A[13:0] 32K A[14:0] 64K A[15:0]Device bank address 8 BA[2:0] 8 BA[2:0] 8
Pin AssignmentsTable 6: Pin Assignments240-Pin UDIMM Front 240-Pin UDIMM BackPin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Sym
Pin DescriptionsThe pin description table below is a comprehensive list of all possible pins for all DDR3modules. All pins listed may not be supported
Table 7: Pin Descriptions (Continued)Symbol Type DescriptionSDA I/O Serial data: Used to transfer addresses and data into and out of the temperature s
DQ MapTable 8: Component-to-Module DQ MapComponentReferenceNumberComponentDQ Module DQModule PinNumberComponentReferenceNumberComponentDQ Module DQMod
Table 8: Component-to-Module DQ Map (Continued)ComponentReferenceNumberComponentDQ Module DQModule PinNumberComponentReferenceNumberComponentDQ Module
Functional Block DiagramFigure 2: Functional Block Diagram DQ DQ DQ DQ DQ DQ DQ DQDQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7U1DM CS# DQS DQS#DQ DQ DQ D
General DescriptionDDR3 SDRAM modules are high-speed, CMOS dynamic random access memory mod-ules that use internally configured 8-bank DDR3 SDRAM devi
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